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EL5150, EL5151, EL5250, EL5251, EL5451
Data Sheet January 16, 2008 FN7384.7
200MHz Amplifiers
The EL5150, EL5151, EL5250, EL5251, and EL5451 are 200MHz bandwidth -3dB voltage mode feedback amplifiers with DC accuracy of 0.01%, 1mV offsets and 10kV/V open loop gains. These amplifiers are ideally suited for applications ranging from precision measurement instrumentation to high speed video and monitor applications. Capable of operating with as little as 1.4mA of current from a single supply ranging from 5V to 12V, dual supplies ranging from 2.5V to 5.0V, these amplifiers are also well suited for handheld, portable and battery-powered equipment. Single amplifiers are offered in SOT-23 packages and duals in a 10 Ld MSOP package for applications where board space is critical. Quad amplifiers are available in a 14 Ld SOIC package. Additionally, singles and duals are available in the industry-standard 8 Ld SOIC package. All parts operate over the industrial temperature range of -40C to +85C.
Features
* 200MHz -3dB bandwidth * 67V/s slew rate * Very high open loop gains 50kV/V * Low supply current = 1.4mA * Single supplies from 5V to 12V * Dual supplies from 2.5V to 5V * Fast disable on the EL5150 and EL5250 * Low cost * Pb-free available (RoHS compliant)
Applications
* Imaging * Instrumentation * Video * Communications devices
Pinouts
EL5150 (8 LD SOIC) TOP VIEW
NC 1 IN- 2 IN+ 3 VS- 4 + 8 CE 7 VS+ 6 OUT 5 NC OUT 1 VS- 2 IN+ 3
EL5150 (6 LD SOT-23) TOP VIEW
6 VS+ 5 CE 4 INOUT 1 VS- 2 IN+ 3
EL5151 (5 LD SOT-23) TOP VIEW
5 VS+
+-
+4 IN-
EL5250 (10 LD MSOP) TOP VIEW
INA+ 1 CEA 2 VS- 3 CEB 4 INB+ 5 + + 10 INA9 OUTA 8 VS+ 7 OUTB 6 INBOUTA 1 INA- 2 INA+ 3 VS- 4
EL5251 (8 LD MSOP) TOP VIEW
8 VS+ + + 7 OUTB 6 INB5 INB+ OUTA 1 INA- 2 INA+ 3 VS+ 4 INB+ 5 INB- 6 OUTB 7
EL5451 (14 LD SOIC) TOP VIEW
14 OUTD -+ +13 IND12 IND+ 11 VS10 INC+ -+ +9 INC8 OUTC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2004-2008. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL5150, EL5151, EL5250, EL5251, EL5451 Ordering Information
PART NUMBER EL5150IS EL5150IS-T7* EL5150IS-T13* EL5150ISZ (Note) EL5150ISZ-T7* (Note) EL5150ISZ-T13* (Note) EL5150IW-T7* EL5150IW-T7A* EL5150IWZ-T7* (Note) EL5150IWZ-T7A* (Note) EL5151IW-T7* EL5151IW-T7A* EL5151IWZ-T7* (Note) EL5151IWZ-T7A* (Note) EL5250IY EL5250IY-T7* EL5250IY-T13* EL5251IS EL5251IS-T7* EL5251IS-T13* EL5251ISZ (Note) EL5251ISZ-T13* (Note) EL5251ISZ-T7* (Note) EL5251IY EL5251IY-T7* EL5251IY-T13* EL5251IYZ (Note) EL5251IYZ-T13* (Note) EL5251IYZ-T7* (Note) EL5451IS EL5451IS-T7* EL5451IS-T13* EL5451ISZ (Note) EL5451ISZ-T7* (Note) EL5451ISZ-T13* (Note) PART MARKING 5150IS 5150IS 5150IS 5150ISZ 5150ISZ 5150ISZ BEAA BEAA BAAJ BAAJ BFAA BFAA BAAK BAAK BAEAA BAEAA BAEAA 5251IS 5251IS 5251IS 5251ISZ 5251ISZ 5251ISZ BAFAA BAFAA BAFAA BBBHA BBBHA BBBHA 5451IS 5451IS 5451IS 5451ISZ 5451ISZ 5451ISZ 8 Ld SOIC 8 Ld SOIC (Tape and Reel) 8 Ld SOIC (Tape and Reel) 8 Ld SOIC (Pb-free) 8 Ld SOIC (Tape and Reel) (Pb-free) 8 Ld SOIC (Tape and Reel) (Pb-free) 6 Ld SOT-23 (Tape and Reel) 6 Ld SOT-23 (Tape and Reel) 6 Ld SOT-23 (Tape and Reel) (Pb-free) 6 Ld SOT-23 (Tape and Reel) (Pb-free) 5 Ld SOT-23 (Tape and Reel) 5 Ld SOT-23 (Tape and Reel) 5 Ld SOT-23 (Tape and Reel) (Pb-free) 5 Ld SOT-23 (Tape and Reel) (Pb-free) 10 Ld MSOP 10 Ld MSOP (Tape and Reel) 10 Ld MSOP (Tape and Reel) 8 Ld SOIC 8 Ld SOIC (Tape and Reel) 8 Ld SOIC (Tape and Reel) 8 Ld SOIC (Pb-free) 8 Ld SOIC (Tape and Reel) (Pb-free) 8 Ld SOIC (Tape and Reel) (Pb-free) 8 Ld MSOP 8 Ld MSOP (Tape and Reel) 8 Ld MSOP (Tape and Reel) 8 Ld MSOP (Pb-free) 8 Ld MSOP (Tape and Reel) (Pb-free) 8 Ld MSOP (Tape and Reel) (Pb-free) 14 Ld SOIC 14 Ld SOIC (Tape and Reel) 14 Ld SOIC (Tape and Reel) 14 Ld SOIC (Pb-free) 14 Ld SOIC (Tape and Reel) (Pb-free) 14 Ld SOIC (Tape and Reel) (Pb-free) PACKAGE PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0038 MDP0038 MDP0038 MDP0038 MDP0038 MDP0038 MDP0038 MDP0038 MDP0043 MDP0043 MDP0043 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0043 MDP0043 MDP0043 MDP0043 MDP0043 MDP0043 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027
*Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451
Absolute Maximum Ratings (TA = +25C)
Supply Voltage between VS and VS- . . . . . . . . . . . . . . . . . . . . 13.2V Slewrate of Voltage between VS and VS- . . . . . . . . . . . . . . . . 1V/s Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 40mA Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.5V to VS + 0.5V Current into IN+, IN-, CE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Thermal Information
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .-40C to +125C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER AC PERFORMANCE BW -3dB Bandwidth
VS+ = +5V, VS- = -5V, RL = 150, TA = +25C, unless otherwise specified. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
AV = +1, RL = 500 AV = +2, RL = 150
200 40 40 10 50 67 100 80 0.04 0.9 12 1.0
MHz MHz MHz MHz V/s V/s ns % nV/Hz pA/Hz
GBWP BW1 SR
Gain Bandwidth Product 0.1dB Bandwidth Slew Rate
AV = 500 AV = +1, RL = 500 VO = 2.5V, AV = +2 VO = 3.0V, AV = 1, RL = 500
tS dG dP VN IN
0.1% Settling Time Differential Gain Error (Note 1) Differential Phase Error (Note 1) Input Referred Voltage Noise Input Referred Current Noise
VOUT = -1V to +1V, AV = -2 AV = +2, RL = 150 AV = +2, RL = 150
DC PERFORMANCE VOS TCVOS AVOL Offset Voltage Input Offset Voltage Temperature Coefficient Open Loop Gain Measured from TMIN to TMAX 15 -1 0.5 -2 56 1 mV V/C kV/V
INPUT CHARACTERISTICS CMIR CMRR IB IOS RIN CIN Common Mode Input Range Common Mode Rejection Ratio Input Bias Current Input Offset Current Input Resistance Input Capacitance Guaranteed by CMRR test -3.5 85 -100 -30 80 100 20 6 170 1 +100 30 +3.5 V dB nA nA M pF
OUTPUT CHARACTERISTICS VOUT Output Voltage Swing Low RL = 150 to GND RL = 500 to GND IOUT Output Current RL = 10 to GND 2.5 3.1 40 2.8 3.4 70 V V mA
3
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451
Electrical Specifications
PARAMETER VS+ = +5V, VS- = -5V, RL = 150, TA = +25C, unless otherwise specified. (Continued) CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
ENABLE (SELECTED PACKAGES ONLY) tEN tDIS IIHCE IILCE VIHCE VILCE SUPPLY ISON ISOFF+ ISOFFPSRR NOTE: 1. Standard NTSC test, AC signal amplitude = 286mVP-P, f = 3.58MHz, VOUT is swept from 0.8V to 3.4V, RL is DC-coupled. Supply Current - Enabled (per amplifier) Supply Current - Disabled (per amplifier) Supply Current - Disabled (per amplifier) No load, VIN = 0V Power Supply Rejection Ratio DC, VS = 3.0V to 6.0V No load, VIN = 0V, CE = +5V 1.12 -10 -25 80 1.35 -1 -14 110 1.6 +5 0 mA A A dB Enable Time Disable Time CE Pin Input High Current CE Pin Input Low Current CE Input High Voltage for Powerdown CE Input Low Voltage for Powerdown EL5150 EL5150 CE = VS+ CE = VS+ - 5V Disable Enable 1 -1 VS+ - 1 VS+ - 3 210 620 5 0 25 +1 ns ns A A V V
Typical Performance Curves
100 -45 180
80 GAIN (dB)
0 PHASE () PHASE ()
90 AV = +1 RL= 500 RF = 0 AV = +2 RL = 150 RF = 400
60
45
0
40
90
-90
20
135
-180
AV = +5 RL = 500 RF = 1.5k
0 1k
10k
100k
1M
10M
100M
180 1G
-270 100k
1M
10M FREQUENCY (Hz)
100M
1G
FREQUENCY (Hz)
FIGURE 1. EL5150 FREQUENCY vs OPEN LOOP GAIN/PHASE
FIGURE 2. PHASE vs FREQUENCY FOR VARIOUS GAINS
4
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451 Typical Performance Curves
5 AV = +1 CL= 5pF NORMALIZED GAIN (dB) 3 NORMALIZED GAIN (dB) 3
(Continued)
5 VS = 5V AV = +2 RF = RG = 402
1 RL = 500 -1 RL = 200 RL = 300 RL = 100 -5 100k 1M 10M FREQUENCY (Hz) 100M 1G
1 RL = 1k -1 RL = 500 RL = 150 RL = 100 -5 0.1 1 10 100
-3
-3
FREQUENCY (Hz)
FIGURE 3. EL5150 GAIN vs FREQUENCY FOR VARIOUS RL
4 AV = +5 RF = 1.5k CL = 5pF RL = 500 RL = 400 RL = 200 -4 RL = 100 -6 100k 1M 10M 100M
FIGURE 4. EL5150 GAIN vs FREQUENCY FOR VARIOUS RL
5 AV = +1 RL = 500 NORMALIZED GAIN (dB) 3 CL = 8.2pF 1 CL = 3.9pF CL = 0pF -3 CL = 15pF
NORMALIZED GAIN (dB)
2
0
-2
-1
-5 100k
1M
10M FREQUENCY (Hz)
100M 300M
FREQUENCY (Hz)
FIGURE 5. EL5150 GAIN vs FREQUENCY FOR VARIOUS RL
5 AV = +2 RL = 500 RF = RG = 400 CL = 68pF CL = 47pF CL = 22pF 1
FIGURE 6. EL5150 GAIN vs FREQUENCY FOR VARIOUS CL
5 AV = +5 RF = 1.5k 3 RL = 500 CL = 68pF 1 CL = 82pF
NORMALIZED GAIN (dB)
3
NORMALIZED GAIN (dB)
-1
CL = 0pF
-1
CL = 47pF CL = 15pF
-3
-3
CL = 0pF
-5 100k
1M
10M
100M
-5 100k
1M FREQUENCY (Hz)
10M
30M
FREQUENCY (Hz)
FIGURE 7. EL5150 GAIN vs FREQUENCY FOR VARIOUS CL
FIGURE 8. EL5150 GAIN vs FREQUENCY FOR VARIOUS CL
5
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451 Typical Performance Curves
5 AV = +1 RL = 500 CL = 5pF CIN- = 18pF CIN- = 12pF CIN- = 8.2pF CIN- = 4.7pF NORMALIZED GAIN (dB) 2
(Continued)
4 AV = +2 RL = 500 CL = 5pF RF = RG = 400 CIN = 12pF
NORMALIZED GAIN (dB)
3
1
0 CIN = 8.2pF -2 CIN = 3.9pF CIN = 0pF -4
-1
CIN- = 3.3pF CIN- = 0pF
-3
CIN- = 1pF
-5 100k
1M
10M FREQUENCY (Hz)
100M
400M
-6 100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 9. EL5150 GAIN vs FREQUENCY FOR VARIOUS CIN4 AV = +5 RF = 1.5k RL = 500 CL = 5pF CIN- = 100pF CIN- = 68pF CIN- = 33pF
FIGURE 10. EL5150 GAIN vs FREQUENCY FOR VARIOUS CIN
4 AV = +5 RF = 1.5k RL = 500 CL = 5pF RL = 500 RL = 300 RL = 200 -4 RL = 100 RL = 50
NORMALIZED GAIN (dB)
2
NORMALIZED GAIN (dB)
2
0 CIN- = 8.2pF -2 CIN- = 8pF CIN- = 3.3pF -4 CIN- = 0pF
0
-2
-6 100k
1M FREQUENCY (Hz)
10M
40M
-6 100k
1M FREQUENCY (Hz)
10M
30M
FIGURE 11. EL5150 GAIN vs FREQUENCY FOR VARIOUS CIN5 AV = +2 RL = 500 CL = 5pF RF = RG = 3k
FIGURE 12. EL5250 GAIN vs FREQUENCY FOR VARIOUS RL
4 RL = 500 CL = 5pF NORMALIZED GAIN (dB) 2
NORMALIZED GAIN (dB)
3
RF = RG = 2k
1 RF = RG = 1k -1 RF = RG = 500 RF = RG = 100
0 AV = +2
AV = +1
-2
-3
-4
AV = +3
-5 100k
1M
10M
100M
-6 100k
1M
10M FREQUENCY (Hz)
100M 300M
FREQUENCY (Hz)
FIGURE 13. EL5150 GAIN vs FREQUENCY FOR VARIOUS RF/RG
FIGURE 14. EL5250 GAIN vs FREQUENCY FOR VARIOUS GAINS
6
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451 Typical Performance Curves
4 RL = 500 CL = 5pF NORMALIZED GAIN (dB) 2 PSRR (dB) AV = +1 AV = +2 AV = +3 -4 80 BOTH CHANNELS SHOWN 20
(Continued)
0 AV = +1 POSITIVE SUPPLY
0
40
-2
60
-6 100k
1M
10M
100M
100 1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY RESPONSE (Hz)
FIGURE 15. EL5250 GAIN vs FREQUENCY FOR VARIOUS GAINS
FIGURE 16. PSRR vs FREQUENCY
0 AV = +1 NEGATIVE SUPPLY 20 CROSSTALK (dB) PSRR (dB)
-40 AV = +2 RL = 500 CL = 5pF IN CHANNEL A OUT CHANNEL B
-50
40
-60
60
-70
80
-80
100 1k
10k
100k
1M
10M
100M
-90 100k
1M
10M
100M
FREQUENCY RESPONSE (Hz)
FREQUENCY (Hz)
FIGURE 17. PSRR vs FREQUENCY
FIGURE 18. EL5250 CROSSTALK vs FREQUENCY
40 AV = +2 RL = 500 50 CL = 5pF IN CHANNEL B OUT CHANNEL A 60
1.000k AV = +2 100.000 IMPEDANCE () 10M 100M
CROSSTALK (dB)
10.000
70
1.000
80
0.100
90 100k
1M
0.001 1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 19. EL5250 CROSSTALK vs FREQUENCY
FIGURE 20. OUTPUT IMPEDANCE
7
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451 Typical Performance Curves
0 AV = +2 20 CMRR (dB) NORMALIZED GROUP DELAY (500ps/DIV) 1500
(Continued)
2500 AV = +1 RL = 500 CL = 5pF
40
500
60
-500
80
-1500
100 100
1k
10k
100k
1M
10M
100M
-2500 1M
10M
100M
600M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 21. CMRR
FIGURE 22. GROUP DELAY
3.0 VOLTAGE NOISE (nV/Hz) CURRENT NOISE (pA/Hz) 4.0 5.0 AV = +1 RL = 500 2.5 C = 5pF L 2.0 1.5 1.0 0.5 0 1.0
100.0
SUPPLY CURRENT (mA)
10.0
1.0
1.5
2.0
2.5
3.0
3.5
4.5
0.1 100
1k
10k
100k
SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
FIGURE 23. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 24. VOLTAGE + CURRENT NOISE vs FREQUENCY
90 80 DISTORTION (dBc) 70 60 50 40 30 AV = +1 RL = 500 10 CL = 2.2pF FREQ = 1.9MHz 0 0 1 2 3 20 3RD HD SLEW RATE (V/s)
105 100 95 90 85 80 75 70 2.2
2ND HD
4
5
6
7
8
9
2.7
3.2
3.7
4.2
4.7
5.2
5.7
6.2
OUTPUT SWING (VP-P)
SPLIT POWER SUPPLY (V)
FIGURE 25. DISTORTION vs OUTPUT AMPLITUDE
FIGURE 26. SLEW RATE vs POWER SUPPLY
8
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451 Typical Performance Curves
-30 HARMONIC DISTORTION (dBc) AV = +5 VS = 5V RL = 500 RF = 402 THD_Fin = 2MHz THD (dBc) -50
(Continued)
-20 AV = +5 VS = 5V RL = 500 RF = 402 VOUT = 2VP-P
-40
-30
THD
-40 2ND HD -50 3RD HD -60
-60
THD_Fin = 500kHz
-70 0 1 2 3 4 5 7 8 OUTPUT VOLTAGE (VP-P)
-70 0.5
1.0 FUNDAMENTAL FREQUENCY (MHz)
10.0
FIGURE 27. TOTAL HARMONIC DISTORTION vs OUTPUT VOLTAGE
FIGURE 28. HARMONIC DISTORTION vs FREQUENCY
20%-80% CH3 RISE 1.874ns
80%-20% CH3 FALL 3.106ns
VOLTAGE (500mV/DIV)
VOLTAGE (50mV/DIV)
AV = +1 RL = 500 CL = 2.2pF
AV = +1 RL = 500 CL = 2.2pF
20%-80% CH3 RISE 11.72ns
80%-20% CH3 FALL 15.28ns
TIME (40ns/DIV)
TIME (40ns/DIV)
FIGURE 29. SMALL SIGNAL STEP RESPONSE
FIGURE 30. LARGE SIGNAL STEP RESPONSE
20%-80% CH3 RISE 4.337ns
80%-20% CH3 FALL 6.229ns
VOLTAGE (500mV/DIV)
VOLTAGE (50mV/DIV)
AV = +2 RL =150 CL = 2.2pF
AV = +2 RL = 150 CL = 2.2pF
20%-80% CH3 RISE 12.87ns
80%-20% CH3 FALL 15.67ns
TIME (40ns/DIV)
TIME (40ns/DIV)
FIGURE 31. SMALL SIGNAL STEP RESPONSE
FIGURE 32. LARGE SIGNAL STEP RESPONSE
9
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451 Typical Performance Curves
(Continued)
AV = +1 RL = 500
RL = 500 SUPPLY = 5.0V, 2.7mA
CH 1 CH 2 CH 4
210ns ENABLE
620ns DISABLE
800ns ENABLE
520ns DISABLE
TIME (400ns/DIV)
TIME (1s/DIV)
FIGURE 33. EL5150 ENABLE/DISABLE
FIGURE 34. EL5250 ENABLE/DISABLE
0.06 0.04 0.02 0 -0.02 -0.04 0 10 20 30 40 50 60 70 80 90 100 IRE
1.5 1.0 0.5 0 -0.5 -1.0 0 10 20 30 40 50 60 70 80 90 100 IRE
DIFFERENTIAL GAIN (%)
FIGURE 35. DIFFERENTIAL GAIN
DIFFERENTIAL PHASE ()
FIGURE 36. DIFFERENTIAL PHASE
4 AV = +1 RL = 500 CL = 5pF ISOSLATION (dB)
-50 AV = +1 RL = 500 CL = 2.7pF
NORMALIZED GAIN (dB)
2
-70
0
2.0V
-90
-2
6.0V
-110
-4
-130
-6 100k
1M
10M
100M 300M
-150 100k
1M
10M FREQUENCY (Hz)
100M 300M
FREQUENCY (Hz)
FIGURE 37. SMALL SIGNAL FREQUENCY vs SUPPLY
FIGURE 38. INPUT-TO-OUTPUT ISOLATION WITH PART DISABLED
10
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451 Typical Performance Curves
(Continued)
1.4 POWER DISSPIATION (W)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1 POWER DISSPIATION (W)
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1.2 1.136W 1.0 909mW 0.8 870mW 0.6 435mW 0.4 0.2 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) SOT23-5/6 JA = 230C/W MSOP8/10 JA = 115C/W SO14 JA = 88C/W SO8 JA = 110C/W
0.9 833mW 0.8 0.7 625mW 0.6 486mW 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) 391mW SOT23-5/6 JA = 265C/W SO14 JA = 120C/W SO8 JA = 160C/W MSOP8/10 JA = 206C/W
FIGURE 39. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 40. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Product Description
The EL5150, EL5151, EL5250, EL5251 and EL5451 are wide bandwidth, low power, low offset voltage feedback operational amplifiers capable of operating from a single or dual power supplies. This family of operational amplifiers are internally compensated for closed loop gain of +1 or greater. Connected in voltage follower mode, driving a 500 load members of this amplifier family demonstrate a -3dB bandwidth of about 200MHz. With the loading set to accommodate typical video application, 150 load and gain set to +2, bandwidth reduces to about 40MHz with a 67V/s slew rate. Power down pins on the EL5151 and EL5251 reduce the already low power demands of this amplifier family to 12A typical while the amplifier is disabled.
accordingly; for instance, if the load resistor is 150, the output swing ranges from -3.5V to 3.5V. This response is a simple application of Ohms law indicating a lower value resistance results in greater current demands of the amplifier. Additionally, the load resistance affects the frequency response of this family as well as all operational amplifiers; as clearly indicated by the Gain vs Frequency For Various RL curves clearly indicate. In the case of the frequency response reduced bandwidth with decreasing load resistance is a function of load resistance in conjunction with the output zero response of the amplifier.
Choosing A Feedback Resistor
A feedback resistor is required to achieve unity gain; simply short the output pin to the inverting input pin. Gains greater than +1 require a feedback and gain resistor to set the desired gain. This gets interesting because the feedback resistor forms a pole with the parasitic capacitance at the inverting input; as the feedback resistance increases the position of the pole shifts in the frequency domain, the amplifier's phase margin is reduced and the amplifier becomes less stable. Peaking in the frequency domain and ringing in the time domain are symptomatic of this shift in pole location. So we want to keep the feedback resistor as small as possible. You may want to use a large feedback resistor for some reason; in this case to compensate the shift of the pole and maintain stability a small capacitor in the few Pico farad range in parallel with the feedback resistor is recommended. For the gains greater than unity it has been determined a feedback resistance ranging from 500 to 750 provides optimal response.
Input, Output and Supply Voltage Range
The EL5150 and family members have been designed to operate with supply voltage ranging from 5V to 12V. Supply voltages range from 2.5V to 5V for split supply operation. And of course split supply operation can easily be achieved using single supplies with by splitting off half of the single supply with a simple voltage divider as illustrated in the application circuit section.
Input Common Mode Range
These amplifiers have an input common mode voltage ranging from 3.5V above the negative supply (VS- pin) to 3.5V below the positive supply (VS+ pin). If the input signal is driven beyond this range the output signal will exhibit distortion.
Maximum Output Swing & Load Resistance
The outputs of the EL5150 and family members exhibit maximum output swing ranges from -4V to 4V for VS = 5V with a load resistance of 500. Naturally, as the load resistance becomes lower, the output swing lowers 11
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451
Gain Bandwidth Product
The EL5150 and family members have a gain bandwidth product of 40MHz for a gain of +5. Bandwidth can be predicted by the following equation: (Gain) x (BW) = GainBandwidthProduct ranging from 70mA and 95mA can be expected and naturally, if the output is shorted indefinitely the part can easily be damaged from overheating; or excessive current density may eventually compromise metal integrity. Maximum reliability is maintained if the output current is always held below 40mA. This limit is set and limited by the design of the internal metal interconnect. Note that in transient applications, the part is extremely robust.
Video Performance
For good video performance, an amplifier is required to maintain the same output impedance and same frequency response as DC levels are changed at the output; this characteristic is widely referred to as "diffgain-diffphase". Many amplifiers have a difficult time with this especially while driving standard video loads of 150, as the output current has a natural tendency to change with DC level. The dG and dP for these families is a respectable 0.04% and 0.9, while driving 150 at a gain of 2. Driving high impedance loads would give a similar or better dG and dP performance as the current output demands placed on the amplifier lessen with increased load.
Power Dissipation
With the high output drive capability of these devices, it is possible to exceed the +125C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for an application to determine if load conditions or package types need to be modified to assure operation of the amplifier in a safe operating area. The maximum power dissipation allowed in a package is determined according to Equation 1:
T JMAX - T AMAX PD MAX = ------------------------------------------- JA (EQ. 1)
Driving Capacitive Loads
These devices can easily drive capacitive loads as demanding as 27pF in parallel with 500 while holding peaking to within 5dB of peaking at unity gain. Of course if less peaking is desired, a small series resistor (usually between 5 to 50) can be placed in series with the output to eliminate most peaking; however, there will be a small sacrifice of gain which can be recovered by simply adjusting the value of the gain resistor.
Where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature JA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or: For sourcing:
n
Driving Cables
Both ends of all cables must always be properly terminated; double termination is absolutely necessary for reflection-free performance. Additionally, a back-termination series resistor at the amplifier's output will isolate the amplifier from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. Again, a small series resistor at the output can help to reduce peaking.
PD MAX = V S x I SMAX +
i=1
( VS - VOUTi ) x ----------------R Li
n
V OUTi
(EQ. 2)
For sinking:
PD MAX = V S x I SMAX +
Disable/Power-Down
Devices with disable can be disabled with their output placed in a high impedance state. The turn off time is about 330ns and the turn on time is about 130ns. When disabled, the amplifier's supply current is reduced to 17A typically; essentially eliminating power consumption. The amplifier's power down is controlled by standard TTL or CMOS signal levels at the ENABLE pin. The applied logic signal is relative to VS- pin. Letting the ENABLE pin float or the application of a signal that is less than 0.8V above VS- enables the amplifier. The amplifier is disabled when the signal at ENABLE pin is above VS+ - 1.5V. Where: VS = Supply voltage
( VOUTi - VS ) x ILOADi
i=1
(EQ. 3)
ISMAX = Maximum quiescent supply current VOUT = Maximum output voltage of the application RLOAD = Load resistance tied to ground ILOAD = Load current N = number of amplifiers (Max = 2) By setting the two PDMAX equations equal to each other, we can solve the output current and RLOAD to avoid the device overheat.
Output Drive Capability
Members of the EL5150 family do not have internal short circuit protection circuitry. Typically, short circuit currents
12
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451
Power Supply Bypassing Printed Circuit Board Layout
As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to the ground plane, a single 4.7F tantalum capacitor in parallel with a 0.1F ceramic capacitor from VS+ to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the VS- pin becomes the negative supply rail. compromised performance. Minimizing parasitic capacitance at the amplifier's inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces.
Application Circuits
Sallen Key Low Pass Filter
A common and easy to implement filter taking advantage of the wide bandwidth, low offset and low power demands of the EL5150. A derivation of the transfer function is provided for convenience (see Figure 41).
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should be kept to a minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in
Sallen Key High Pass Filter
Again, this useful filter benefits from the characteristics of the EL5150. The transfer function is very similar to the low pass so only the results are presented (see Figure 42).
K = 1+
5V V2 0.1F
RB RA
C1 R1 1k V1 R2 1k C2 1n
2
1n
3
1 V1 R2C2s + 1 Vo V1 - Vi Vo - Vi 1 + K - V1 + =0 1 R1 R2 C1s K H(s) = R1C1R2C2s 2 + ((1 - K )R1C1 + R1C2 + R21C2)s + 1 1 H( jw ) = 2 1 - w R1C1R2C2 + jw ((1 - K )R1C1 + R1C2 + R2C2) Vo = K Holp = K wo = Q= 1 R1C1R2C2 1 R1C1 R1C2 R2C2 (1 - K ) + + R2C2 R2C1 R1C1
U1A 4
+
V+
1
VOUT R7 1k
-
V-
11 1k RB RA 1k
Holp = K 1 RC 1 Q= 3 -K wo =
Equations simplify if we let all components be equal R = C
0.1F 5V V3
FIGURE 41. SALLEN KEY LOW PASS FILTER
13
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451
5V V2 0.1F
R8 C7 1n V1 C9 1n C2 1n
2
Holp = K
U1A 4
1k
3
+
V+
wo =
1
1 R1C1R2C2 1
VOUT R7 1k
-
V-
Q=
11 1k RB RA 1k
R1C1 R1C2 R2C2 (1 - K ) + + R2C2 R2C1 R1C1
Holp =
0.1F 5V V3
K 4 -K
Equations simplify if we let all components be equal R = C
2 wo = RC Q= 2 4 -K
FIGURE 42. SALLEN KEY HIGH PASS FILTER
Differential Output Instrumentation Amplifier
The addition of a third amplifier to the conventional three amplifier Instrumentation Amplifier introduces the benefits of differential signal realization; specifically the advantage of using common mode rejection to remove coupled noise and ground -potential errors inherent in remote transmission. This configuration also provides enhanced bandwidth, wider output swing and faster slew rate than conventional three amplifier solutions with only the cost of an additional amplifier and few resistors.
e1
A1 + R2
R3
R3
A3 + R3 R3 +
eo3
RG
R3
R3
REF eo
R2
A4 + R3 R3
eo4
A2 e2 +
e o3 = - ( 1 + 2R 2 R G ) ( e 1 - e 2 ) e o = - 2 ( 1 + 2R 2 R G ) ( e 1 - e 2 ) 2f C1, 2 BW = ----------------A Di
e o4 = ( 1 + 2R 2 R G ) ( e 1 - e 2 )
A Di = - 2 ( 1 + 2R 2 R G )
14
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451
Strain Gauge
The strain gauge is an ideal application to take advantage of the moderate bandwidth and high accuracy of the EL5150. The operation of the circuit is very straight-forward. As the strain variable component resistor in the balanced bridge is subjected to increasing strain, its resistance changes resulting in an imbalance in the bridge. A voltage variation from the referenced high accuracy source is generated and translated to the difference amplifier through the buffer stage. This voltage difference as a function of the strain is converted into an output voltage.
5V V2 0.1F
VARIABLE SUBJECT TO STRAIN
1k V5 0V R15 1k
R15 1k R14
22
4
R17 1k R18 1k
3
U1A 4
+
V+ 2
1
22
4
-
V-
VOUT (V1+V2+V3+V4) RL 1k
11 1k RF
0.1F 5V V4
15
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451 Small Outline Package Family (SO)
A D N (N/2)+1 h X 45
A E E1 PIN #1 I.D. MARK c SEE DETAIL "X"
1 B
(N/2) L1
0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X
SEATING PLANE L 4 4
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07
16
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451 SOT-23 Package Family
e1 A N 6 4
MDP0038
D
SOT-23 PACKAGE FAMILY MILLIMETERS SYMBOL A A1 SOT23-5 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 5 SOT23-6 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 6 TOLERANCE MAX 0.05 0.15 0.05 0.06 Basic Basic Basic Basic Basic 0.10 Reference Reference Rev. F 2/07 NOTES:
E1 2 3
E
A2 b c
0.20 C
0.15 C D 2X 5 e B b NX 1 2 3 2X 0.20 M C A-B D
D E E1 e e1 L L1 N
0.15 C A-B 2X C D
1
3
A2 SEATING PLANE 0.10 C NX A1
1. Plastic or metal protrusions of 0.25mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. This dimension is measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Index area - Pin #1 I.D. will be located within the indicated zone (SOT23-6 only).
(L1)
H
6. SOT23-5 version has no center lead (shown as a dashed line).
A
GAUGE PLANE c L 0 +3 -0
0.25
17
FN7384.7 January 16, 2008
EL5150, EL5151, EL5250, EL5251, EL5451 Mini SO Package Family (MSOP)
0.25 M C A B D N A (N/2)+1
MDP0043
MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. 0.05 0.09 +0.07/-0.08 0.05 0.10 0.15 0.10 Basic 0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included.
E
E1
PIN #1 I.D.
A2 b c
B
1 (N/2)
D E E1
e C SEATING PLANE 0.10 C N LEADS b
H
e L L1 N
0.08 M C A B
L1 A c SEE DETAIL "X"
2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
A2 GAUGE PLANE L DETAIL X
0.25
A1
3 3
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 18
FN7384.7 January 16, 2008


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